Design of Control Unit
The Control Unit (CU) in a computer's Central Processing Unit (CPU) is classified into two major categories:
- Hardwired Control
- Microprogrammed Control
Hardwired Control
The Hardwired Control organization implements the control logic using a combination of gates, flip-flops, decoders, and other digital circuits. This approach relies on a fixed, predefined hardware configuration to generate control signals, allowing for fast execution but offering limited flexibility for modifications or updates.
The image below illustrates the block diagram of a Hardwired Control organization.
Control Unit of a Basic Computer:
When an instruction is fetched from the memory unit, it is loaded into the instruction register (IR).
The components of an instruction register include the I bit, the operation code, and bits 0 through 11.
The operation code located in bits 12 through 14 is encoded using a 3x8 decoder.
The outputs of the decoder are labeled with the symbols D0 through D7.
The operation code in bit 15 is transferred to a flip-flop represented by the symbol I.
The operation codes from bits 0 through 11 are fed into the control logic gates.
The Sequence Counter (SC) can count in binary from 0 to 15.
Micro-programmed Control
The Microprogrammed Control organization is implemented using a programming approach.
In Microprogrammed Control, micro-operations are carried out by executing a program composed of micro-instructions.
The image below illustrates the block diagram of a Microprogrammed Control organization.
Microprogrammed Control Unit of a Basic Computer:
The Control Memory is typically assumed to be a ROM, where all control information is permanently stored.
The Control Register holds the microinstruction fetched from the memory.
The microinstruction contains a control word that specifies one or more micro-operations for the data processor.
As the micro-operations are being executed, the next address is computed in the next address generator circuit and then transferred to the control address register to fetch the next microinstruction.
The next address generator, often called a microprogram sequencer, determines the address sequence to be read from the control memory.